AI to Reshape the Global Technology Landscape in 2026, Says TrendForce
TrendForce has identified 10 key technology trends that will define the tech industry's evolution in 2026. The highlights of these findings are outlined below:
AI Chip Competition Intensifies as Liquid Cooling Gains Widespread Adoption in Data Centers
In 2026, the high demand for AI data center construction—fueled by increased capital spending by major North American CSPs and the rise of sovereign cloud projects worldwide—is anticipated to boost AI server shipments by over 20% year-over-year.
NVIDIA, the leading name in AI today, will face stronger competition ahead. AMD plans to challenge NVIDIA by introducing its MI400 full-rack solution, which mirrors NVIDIA’s GB/VR systems and is aimed at CSP clients. Meanwhile, major North American CSPs are increasing their in-house ASIC development. In China, geopolitical tensions have sped up the drive for technological self-sufficiency, with companies like ByteDance, Baidu, Alibaba, Tencent, Huawei, and Cambricon boosting efforts to create their own AI chips. This is set to intensify the global competition.
Thermal design power (TDP) per chip is increasing rapidly as AI processors become more powerful, jumping from 700W for NVIDIA’s H100 and H200 to over 1,000W for the upcoming B200 and B300. This increase in heat output is leading to a widespread adoption of liquid-cooling systems in server racks, with usage expected to reach 47% by 2026.
Microsoft has introduced advanced chip-level microfluidic cooling technology to enhance thermal efficiency. In the near to midterm, cold-plate liquid cooling will remain the primary solution, with CDUs transitioning from liquid-to-air to liquid-to-liquid setups. Over the long term, the market is likely to move toward more detailed chip-level thermal management.
Breaking Bandwidth Barriers: HBM and Optical Communications Redefine AI Cluster Architectures
The rapid increase in data volume and memory bandwidth needs, driven by expanding AI workloads from training to inference, is challenging system design by exposing bottlenecks in transmission speed and power efficiency. To address these limitations, HBM and optical interconnect technologies are emerging as critical enablers of next-generation AI architectures.
Current generations of HBM leverage 3D stacking and through-silicon via to significantly reduce the distance between processors and memory, achieving higher bandwidth and efficiency. The upcoming HBM4 generation will introduce greater channel density and wider I/O bandwidth to further support the massive computational demands of AI GPUs and accelerators.
However, as model parameters surpass the trillion-scale level and GPU clusters expand exponentially, memory bandwidth once again emerges as a major performance bottleneck. Memory manufacturers are addressing this issue by optimizing HBM stack architectures, innovating in packaging and interface design, and co-designing with logic chips to enhance on-chip bandwidth for AI processors.
While these advances mitigate memory-related bottlenecks, data transmission across chips and modules has become the next critical limitation to system performance. To overcome these limits, co-packaged optics (CPO) and silicon photonics (SiPh) are emerging are strategic focus areas for GPU makers and CSPs.
Currently, 800G and 1.6T pluggable optical transceivers have already entered mass production, and starting in 2026, even higher-bandwidth SiPh/CPO platforms are expected to be deployed in AI switches. These next-gen optical communication technologies will enable high-bandwidth, low-power data interconnects, optimizing overall system bandwidth density and energy efficiency to meet the escalating performance demands of AI infrastructure.
Overall, the memory industry is rapidly evolving toward bandwidth efficiency as its core competitive advantage. Advances in optical communications—designed to handle data transmission across chips and modules—are emerging as the most effective solution to overcome the limitations of traditional electrical interfaces in long-distance, high-density data transfers. As a result, high-speed transmission technologies are set to become a key pillar of AI infrastructure evolution.